Huawei unveiled a new semiconductor design principle called Tau Scaling Law, presenting it as a fresh strategy to improve chip performance as artificial intelligence demand grows and U.S. sanctions continue to restrict China’s access to advanced chipmaking technology.
According to the company, the principle shifts the industry’s focus from traditional geometric scaling, which relies on shrinking transistors, toward time-based scaling, which aims to reduce signal delays across devices, circuits, chips and systems.
Huawei said the approach can improve transistor density, energy efficiency and overall performance through technologies including LogicFolding.
Tau Scaling targets AI computing gains
Huawei said the new principle can be applied to smartphones and AI computing, two areas where chip performance has become increasingly important for China’s technology sector.
The company said its Kirin chips scheduled for launch in fall 2026 will be the first to adopt the LogicFolding architecture, which is expected to improve performance by shortening critical signal paths and reducing wiring constraints in circuit layouts.
For AI computing, the approach could give Huawei another tool to strengthen its domestic chip stack, with the company’s Ascend processors already central to its AI strategy as Chinese firms seek alternative computing power while restrictions limit access to some advanced U.S. chips.
Huawei said it has designed and mass-produced 381 chips over the past six years based on Tau Scaling Law, serving a range of industries and markets. By 2031, it expects high-end chips designed under the principle to reach transistor density equivalent to 14 angstrom, or 1.4-nanometer, processes.
Industry focus turns to execution
The announcement comes as global chipmakers face slowing gains from Moore’s Law, which guided the semiconductor industry for more than five decades by linking progress to the steady shrinking of transistors.
Huawei said the industry is now facing physical limits and weaker cost benefits from traditional scaling, making it necessary to find new ways to sustain performance improvements. Its answer is a multi-level design model that links devices, circuits, chips and systems, rather than treating chip progress as mainly a manufacturing-node race.
The market is now waiting to see the real implications of Huawei’s Tau Scaling Law, particularly whether the approach can translate into stronger product performance, better manufacturing efficiency and wider adoption across AI workloads.
Huawei builds on its AI chip push
The update adds to Huawei’s broader effort to build more of China’s AI infrastructure at home, with the company investing heavily in Ascend AI chips, Kunpeng processors and large-scale computing systems designed for model training and inference.
For Huawei, Tau Scaling Law serves as both a technical roadmap and a strategic signal, showing how the company aims to keep advancing chip performance even as access to the most advanced global supply chains remains constrained, with system-level design now central to its next phase in AI and semiconductor development.